SIMD/Overview - Revision history

Maikmerten: /* What is SIMD? */

2014-05-02T16:24:12Z

What is SIMD?

← Older revision		Revision as of 16:24, 2 May 2014
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	SIMD registers essentially contain vectors. SIMD instructions thus essentially are vector instructions. Awesome!		SIMD registers essentially contain vectors. SIMD instructions thus essentially are vector instructions. Awesome!

			=== operations on packed data ===

			To actually get something done with SIMD operations are needed that work on SIMD data types.

			A list of typical operations is assembled on the [[SIMD/Operations \|SIMD Operations]] page.

	=== SIMD instruction sets ===		=== SIMD instruction sets ===

Maikmerten: /* packed data */

2014-04-10T17:48:03Z

packed data

← Older revision		Revision as of 17:48, 10 April 2014
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	SIMD engines usually work with wide registers (a typical number is 128 bits) that can contain several independent values. A typical 128 bit SIMD register can contain...		SIMD engines usually work with wide registers (a typical number is 128 bits) that can contain several independent values. A typical 128 bit SIMD register can contain...

	* sixteen 8 bit values ([[SIMD/Types/int8x16 \|int8x16]] and [[SIMD/Types/uint8x16 \|uint8x16]])		* sixteen 8 bit integer values ([[SIMD/Types/int8x16 \|int8x16]] and [[SIMD/Types/uint8x16 \|uint8x16]])
	* eight 16 bit values ([[SIMD/Types/int16x8 \|int16x8]] and [[SIMD/Types/uint16x8 \|uint16x8]])		* eight 16 bit integer values ([[SIMD/Types/int16x8 \|int16x8]] and [[SIMD/Types/uint16x8 \|uint16x8]])
	* four 32 bit values ([[SIMD/Types/int32x4 \|int32x4]] and [[SIMD/Types/uint32x4 \|uint32x4]])		* four 32 bit integer values ([[SIMD/Types/int32x4 \|int32x4]] and [[SIMD/Types/uint32x4 \|uint32x4]])
	* four single precision floating point values ([[SIMD/Types/float32x4 \|float32x4]])		* four single precision floating point values ([[SIMD/Types/float32x4 \|float32x4]])
	* two double precision floating point values ([[SIMD/Types/float64x2 \|float64x2]])		* two double precision floating point values ([[SIMD/Types/float64x2 \|float64x2]])

Maikmerten: /* packed data */ prepare links to data type pages

2014-04-10T16:03:54Z

packed data: prepare links to data type pages

← Older revision		Revision as of 16:03, 10 April 2014
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	SIMD engines usually work with wide registers (a typical number is 128 bits) that can contain several independent values. A typical 128 bit SIMD register can contain...		SIMD engines usually work with wide registers (a typical number is 128 bits) that can contain several independent values. A typical 128 bit SIMD register can contain...

	* sixteen 8 bit values (int8x16 and uint8x16)		* sixteen 8 bit values ([[SIMD/Types/int8x16 \|int8x16]] and [[SIMD/Types/uint8x16 \|uint8x16]])
	* eight 16 bit values (int16x8 and uint16x8)		* eight 16 bit values ([[SIMD/Types/int16x8 \|int16x8]] and [[SIMD/Types/uint16x8 \|uint16x8]])
	* four 32 bit values (int32x4 and uint32x4)		* four 32 bit values ([[SIMD/Types/int32x4 \|int32x4]] and [[SIMD/Types/uint32x4 \|uint32x4]])
	* four single precision floating point values (float32x4)		* four single precision floating point values ([[SIMD/Types/float32x4 \|float32x4]])
	* two double precision floating point values (float64x2)		* two double precision floating point values ([[SIMD/Types/float64x2 \|float64x2]])

	SIMD registers essentially contain vectors. SIMD instructions thus essentially are vector instructions. Awesome!		SIMD registers essentially contain vectors. SIMD instructions thus essentially are vector instructions. Awesome!

Maikmerten: Start list of SIMD uses

2014-04-09T19:18:52Z

Start list of SIMD uses

← Older revision		Revision as of 19:18, 9 April 2014
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	There is a proposal designed by folks at Intel (a company that happens to sell SIMD-enabled CPUs): [https://01.org/blogs/tlcounts/2014/bringing-simd-javascript https://01.org/blogs/tlcounts/2014/bringing-simd-javascript]		There is a proposal designed by folks at Intel (a company that happens to sell SIMD-enabled CPUs): [https://01.org/blogs/tlcounts/2014/bringing-simd-javascript https://01.org/blogs/tlcounts/2014/bringing-simd-javascript]

			== Algorithms and use cases for SIMD ==

			Not every algorithm can benefit from SIMD instructions. Generally speaking, it's necessary to have several identically-typed values of at hand on which to apply an identical sequence of operations.

			The following algorithms can benefit greatly from SIMD operations:

			* [[SIMD/Uses/SAD \| Sum of Absolute Differences]]
			* [[SIMD/Uses/DCT \| (Inverse) Discrete Cosinus Transformation]]
			* [[SIMD/Uses/MDCT \| (Inverse) Modified Discrete Cosinus Transformation]]
			* [[SIMD/Uses/Conversion \| Data type conversion]]

Maikmerten: /* SIMD instruction sets */

2014-04-09T19:00:34Z

SIMD instruction sets

← Older revision		Revision as of 19:00, 9 April 2014
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	=== SIMD instruction sets ===		=== SIMD instruction sets ===

	* [http://en.wikipedia.org/wiki/Sse2 SSE2]: Available on every not completely outdated CPU from Intel, AMD, or VIA. The SSE2 instructions are guaranteed to be available 64-bit x86-CPUs („x86-64“).		* [http://en.wikipedia.org/wiki/Sse2 SSE2]: Available on every not completely outdated CPU from Intel, AMD, or VIA. The SSE2 instructions are guaranteed to be available on all 64-bit x86-CPUs („x86-64“).
	* [http://en.wikipedia.org/wiki/Advanced_Vector_Extensions AVX]: Available on modern high-performance CPUs from Intel and AMD.		* [http://en.wikipedia.org/wiki/Advanced_Vector_Extensions AVX]: Available on modern high-performance CPUs from Intel and AMD.
	* [http://en.wikipedia.org/wiki/NEON_%28instruction_set%29#NEON NEON]: Available on basically every modern ARM-compatible CPU designed for general purpose applications (for instance, the vast majority of ARM CPUs in smartphones or tablets support NEON).		* [http://en.wikipedia.org/wiki/NEON_%28instruction_set%29#NEON NEON]: Available on basically every modern ARM-compatible CPU designed for general purpose applications (for instance, the vast majority of ARM CPUs in smartphones or tablets support NEON).

Maikmerten: /* What is SIMD? */ Instruction sets

2014-04-09T18:54:58Z

What is SIMD?: Instruction sets

← Older revision		Revision as of 18:54, 9 April 2014
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	SIMD registers essentially contain vectors. SIMD instructions thus essentially are vector instructions. Awesome!		SIMD registers essentially contain vectors. SIMD instructions thus essentially are vector instructions. Awesome!

			=== SIMD instruction sets ===

			* [http://en.wikipedia.org/wiki/Sse2 SSE2]: Available on every not completely outdated CPU from Intel, AMD, or VIA. The SSE2 instructions are guaranteed to be available 64-bit x86-CPUs („x86-64“).
			* [http://en.wikipedia.org/wiki/Advanced_Vector_Extensions AVX]: Available on modern high-performance CPUs from Intel and AMD.
			* [http://en.wikipedia.org/wiki/NEON_%28instruction_set%29#NEON NEON]: Available on basically every modern ARM-compatible CPU designed for general purpose applications (for instance, the vast majority of ARM CPUs in smartphones or tablets support NEON).

	== JavaScript ==		== JavaScript ==

Maikmerten: /* JavaScript */

2014-04-09T18:05:58Z

JavaScript

← Older revision		Revision as of 18:05, 9 April 2014
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	* Operations that are defined on the SIMD data types		* Operations that are defined on the SIMD data types

	JavaScript currently has no support for SIMD operations. Thus developers cannot harness the awesome computational powers of SIMD-enabled CPUs.		JavaScript currently has no support for SIMD data types or operations. Thus developers cannot harness the awesome computational powers of SIMD-enabled CPUs.

	=== Proposals for SIMD support in Javascript ===		=== Proposals for SIMD support in Javascript ===

	There is a proposal designed by folks at Intel (a company that happens to sell SIMD-enabled CPUs): [https://01.org/blogs/tlcounts/2014/bringing-simd-javascript https://01.org/blogs/tlcounts/2014/bringing-simd-javascript]		There is a proposal designed by folks at Intel (a company that happens to sell SIMD-enabled CPUs): [https://01.org/blogs/tlcounts/2014/bringing-simd-javascript https://01.org/blogs/tlcounts/2014/bringing-simd-javascript]

Maikmerten: /* JavaScript */ link to Intel proposal

2014-04-09T17:58:54Z

JavaScript: link to Intel proposal

← Older revision		Revision as of 17:58, 9 April 2014
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	JavaScript currently has no support for SIMD operations. Thus developers cannot harness the awesome computational powers of SIMD-enabled CPUs.		JavaScript currently has no support for SIMD operations. Thus developers cannot harness the awesome computational powers of SIMD-enabled CPUs.

			=== Proposals for SIMD support in Javascript ===

			There is a proposal designed by folks at Intel (a company that happens to sell SIMD-enabled CPUs): [https://01.org/blogs/tlcounts/2014/bringing-simd-javascript https://01.org/blogs/tlcounts/2014/bringing-simd-javascript]

Maikmerten: Initial overview on SIMD

2014-04-09T17:47:38Z

Initial overview on SIMD

New page

== What is SIMD? ==

Wikipedia has a nice [http://en.wikipedia.org/wiki/Simd definition of SIMD] for us:

<cite>
Single instruction, multiple data (SIMD), is a class of parallel computers in Flynn's taxonomy. It describes computers with multiple processing elements that perform the same operation on multiple data points simultaneously. Thus, such machines exploit data level parallelism, but not concurrency: there are simultaneous (parallel) computations, but only a single process (instruction) at a given moment. SIMD is particularly applicable to common tasks like adjusting the contrast in a digital image or adjusting the volume of digital audio. Most modern CPU designs include SIMD instructions in order to improve the performance of multimedia use.
</cite>

In short, SIMD allows for processing several data values with one single instruction. It's a cheap way to increase the computational power of CPUs: What is mostly needed are wide ALUs (those are cheap) and comparatively little control logic.

To unlock the computation potential of modern CPUs it is essential to utilize SIMD instructions.

=== packed data ===

SIMD engines usually work with wide registers (a typical number is 128 bits) that can contain several independent values. A typical 128 bit SIMD register can contain...

* sixteen 8 bit values (int8x16 and uint8x16)
* eight 16 bit values (int16x8 and uint16x8)
* four 32 bit values (int32x4 and uint32x4)
* four single precision floating point values (float32x4)
* two double precision floating point values (float64x2)

SIMD registers essentially contain vectors. SIMD instructions thus essentially are vector instructions. Awesome!

== JavaScript ==

To be able to use SIMD operations one needs

* SIMD data types
* Operations that are defined on the SIMD data types

JavaScript currently has no support for SIMD operations. Thus developers cannot harness the awesome computational powers of SIMD-enabled CPUs.

← Older revision		Revision as of 17:48, 10 April 2014
Line 15:		Line 15:
	SIMD engines usually work with wide registers (a typical number is 128 bits) that can contain several independent values. A typical 128 bit SIMD register can contain...		SIMD engines usually work with wide registers (a typical number is 128 bits) that can contain several independent values. A typical 128 bit SIMD register can contain...

	* sixteen 8 bit values ([[SIMD/Types/int8x16 \|int8x16]] and [[SIMD/Types/uint8x16 \|uint8x16]])		* sixteen 8 bit integer values ([[SIMD/Types/int8x16 \|int8x16]] and [[SIMD/Types/uint8x16 \|uint8x16]])
	* eight 16 bit values ([[SIMD/Types/int16x8 \|int16x8]] and [[SIMD/Types/uint16x8 \|uint16x8]])		* eight 16 bit integer values ([[SIMD/Types/int16x8 \|int16x8]] and [[SIMD/Types/uint16x8 \|uint16x8]])
	* four 32 bit values ([[SIMD/Types/int32x4 \|int32x4]] and [[SIMD/Types/uint32x4 \|uint32x4]])		* four 32 bit integer values ([[SIMD/Types/int32x4 \|int32x4]] and [[SIMD/Types/uint32x4 \|uint32x4]])
	* four single precision floating point values ([[SIMD/Types/float32x4 \|float32x4]])		* four single precision floating point values ([[SIMD/Types/float32x4 \|float32x4]])
	* two double precision floating point values ([[SIMD/Types/float64x2 \|float64x2]])		* two double precision floating point values ([[SIMD/Types/float64x2 \|float64x2]])