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Project Silk: Difference between revisions
→Architecture
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To achieve the goal, it aligns HW Vsync signals among input, content painting and composition modules. | To achieve the goal, it aligns HW Vsync signals among input, content painting and composition modules. | ||
=== Architecture === | === Architecture === | ||
<center>[[File: | <center>[[File:silk_object_diagram.png|800px|Project Silk Object relation]]</center> | ||
<center>Fig 1. Silk object diagram.</center> | <center>Fig 1. Silk object diagram.</center> | ||
<center>[[File: | <center>[[File:silk_class_diagram.png|800px|Project Silk Object relation]]</center> | ||
<center>Fig 2. Silk class diagram.</center> | <center>Fig 2. Silk class diagram.</center> | ||