Platform/GFX/MemoryBandwidth
tinymembench v0.3.9 (simple benchmark for memory throughput and latency) ========================================================================== == Memory bandwidth tests == == == == Note 1: 1MB = 1000000 bytes == == Note 2: Results for 'copy' tests show how many bytes can be == == copied per second (adding together read and writen == == bytes would have provided twice higher numbers) == == Note 3: 2-pass copy means that we are using a small temporary buffer == == to first fetch data into it, and only then write it to the == == destination (source -> L1 cache, L1 cache -> destination) == == Note 4: If sample standard deviation exceeds 0.1%, it is shown in == == brackets == ========================================================================== C copy backwards : 9805.2 MB/s (2.5%) C copy : 9832.3 MB/s (6.9%) C copy prefetched (32 bytes step) : 9556.3 MB/s (2.5%) C copy prefetched (64 bytes step) : 9532.4 MB/s (2.1%) C 2-pass copy : 9445.8 MB/s (1.6%) C 2-pass copy prefetched (32 bytes step) : 9120.2 MB/s (2.7%) C 2-pass copy prefetched (64 bytes step) : 9102.7 MB/s (2.2%) C fill : 16685.5 MB/s (4.3%) --- standard memcpy : 11950.6 MB/s (1.8%) standard memset : 23193.5 MB/s (1.9%) ========================================================================== == Memory latency test == == == == Average time is measured for random memory accesses in the buffers == == of different sizes. The larger is the buffer, the more significant == == are relative contributions of TLB, L1/L2 cache misses and SDRAM == == accesses. For extremely large buffer sizes we are expecting to see == == page table walk with several requests to SDRAM for almost every == == memory access (though 64MiB is not nearly large enough to experience == == this effect to its fullest). == == == == Note 1: All the numbers are representing extra time, which needs to == == be added to L1 cache latency. The cycle timings for L1 cache == == latency can be usually found in the processor documentation. == == Note 2: Dual random read means that we are simultaneously performing == == two independent memory accesses at a time. In the case if == == the memory subsystem can't handle multiple outstanding == == requests, dual random read has the same timings as two == == single reads performed one after another. == ========================================================================== block size : single random read / dual random read 1024 : 0.0 ns / 0.0 ns 2048 : 0.0 ns / 0.0 ns 4096 : 0.0 ns / 0.0 ns 8192 : 0.0 ns / 0.0 ns 16384 : 0.0 ns / 0.0 ns 32768 : 0.0 ns / 0.0 ns 65536 : 1.0 ns / 1.2 ns 131072 : 1.5 ns / 1.7 ns 262144 : 1.8 ns / 2.0 ns 524288 : 6.4 ns / 8.0 ns 1048576 : 8.9 ns / 10.2 ns 2097152 : 10.7 ns / 11.3 ns 4194304 : 13.7 ns / 14.0 ns 8388608 : 36.8 ns / 45.9 ns 16777216 : 42.8 ns / 47.1 ns 33554432 : 54.9 ns / 49.5 ns 67108864 : 81.9 ns / 94.9 ns